Job responsibilities:

1. Analysis, design and coding of RTL;
2. Responsible for the design, simulation and verification of the digital circuit part of the project.
3. Participate in the verification of FPGA, chip testing and document writing.
4. Participate in the work of integration and time series convergence;
5. Participate in later chip testing.

Requirements:

1. Majors related to microelectronics, electronic information science and technology;
   More than 2 or 5 years working experience in ASIC/SOC digital circuit design;
3. Have a good digital circuit foundation, familiar with the forward design process, proficient in using EDA tools such as vcs, nc-verilog, verdi, DC and       Verilog language;
4. Proficiency in various peripheral interface protocols and AMBA bus protocols;
5. Experience in image ISP, USB, MIPI, JPEG, Video, DDR and MCU design is preferred.
6. Strong learning ability, good communication ability and team work ability, with a conscientious and responsible working attitude.

Fringe benefits:

  Recruitment: Senior Algorithmic Engineer

Job responsibilities:

1. Research and development of ISP image processing algorithm;
2. Responsible for security and development of Camera algorithm in vehicle market, and responsible for the final effect;
3. Be responsible for the technical feasibility analysis of camera related algorithms and participate in the scheme design;
4. Participate in the development plan and detailed design of Camera algorithm;
5. Make a technical analysis of the Camera algorithm for market competition.

Requirements:

1. Bachelor degree or above in Communication, Signal Processing, etc.
2. Solid MATLAB, C/C++ algorithm Writing ability;
3. Have more than 2 years experience in image processing development, and have successful product cases of image processing.
4. Familiar with many image processing algorithms, such as gamma correction, color correction, distortion correction, white balance, sharpening,   defogging, WDR, 3D NR, 2DNR, etc.
5. Familiar with the development of ISP algorithm on at least one platform (special ISP, FPGA);
6. Strong learning ability, deep research spirit, strong communication ability and team spirit;
7. Deeper reading ability of English literature;
8. Experience in ISP on FPGA platform is preferred.
9. Experience in Sensor imaging quality testing and evaluation is preferred.

Fringe benefits:

1. Enjoy all kinds of national statutory holidays and have holiday benefits, paid sick leave and annual leave;
2. Benefit bonus at the end of the year;
   Working hours: flexible 8 hours, 5 days, double rest